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Gmane
From: Mathieu Desnoyers <compudj <at> krystal.dyndns.org>
Subject: Userspace RCU 0.2.4
Newsgroups: gmane.linux.kernel
Date: Monday 19th October 2009 23:59:05 UTC (over 7 years ago)
* Pavel Machek ([email protected]) wrote:
> On Sun 2009-10-18 18:02:43, Mathieu Desnoyers wrote:
> > * Pavel Machek ([email protected]) wrote:
> > > On Thu 2009-10-15 13:40:54, Pierre-Marc Fournier wrote:
> > > > Josh Triplett wrote:
> > > > > 
> > > > > Even Debian has given up on real 386 systems at this point,
primarily
> > > > > because system libraries like glibc have; 486 and better
represents the
> > > > > bare minimum required at this point.  I don't know of any
distributions
> > > > > supporting real 386 systems at this point, and doing so would
represent
> > > > > a major undertaking.
> > > > > 
> > > > 
> > > > What about embedded systems? Anyone know if some 386 chips, perhaps
even
> > > > in smp configurations, are still in use in those?
> > > 
> > > smp 386: definitely not.
> > 
> > Hrm, so for UP 386, I wonder what's the best approach.
> > 
> > One would be to encapsulate all write accesses to the RCU pointers. If
> > we detect that the architecture lacks cmpxchg, _all_ update operations
> > (rcu_assign_pointer, rcu_xchg_pointer and rcu_cmpxchg_pointer) would
> > have to use the signal-disabled+mutex fall-back.
> > 
> > Does it make sense ?
> 
> Yep, but it sounds expensive. Another option is to ignore the issue
> and see how many people still have 386s :-). Few  embedded  systems
> may be affected, but...

Well.. I just enhanced liburcu to fully support 386 SMP (even if
opinions seems to vary regarding its usefulness...) ;) It adds _no_
overhead whatsoever if building for i486+ or x86 64.

What I did is a complete "compatibility mode" for all uatomic_arch_x86.h
atomic operations (it's my own user-space reimplementation of the Linux
kernel atomic.h). It's in liburcu 0.2.4 (now released).

How it works:

config x86 64 or x86 32 > i386 :

#define to map directly to atomic operations.

config i386 :

dynamically detect the cpu id, caches it in "cas_avail" variable.
If cas_avail is -1 (unset) -> dynamically check, cache result.
If cas_avail is 1 -> use atomic operations.
If cas_avail is 0 -> use compatibility mode for _all_ uatomic
  write operations involving signal disabling and a mutex. Only
  uatomic_read is exempt from locking.

So it should be safe to access RCU pointers through the
rcu_cmpxchg/xchg/set/assign_pointer() and rcu_dereference() primitives.

I tried to force using the compatibility mode by changing the condition
in compat_arch_x86.c and building for i386 compatibility. It works fine
and passes the test_uatomic test cases. Passes the rcutorture test too.

Mathieu

> 
> 									Pavel
> -- 
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
> 
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-- 
Mathieu Desnoyers
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