V3->V4 : Use a single linked per cpu list instead of a per cpu array.
This results in improvements even for the single threaded
case. I think this is ready for more widespread testing (-next?)
The number of partial pages per cpu is configurable via
V2->V3 : Work on the todo list. Still some work to be done to reduce
code impact and make this all cleaner. (Pekka: patch 1-3
are cleanup patches of general usefulness. You got #1 already
2+3 could be picked up w/o any issue).
The following patchset introduces per cpu partial lists which allow
a performance increase of around ~10-20% with hackbench on my Sandybridge
These lists help to avoid per node locking overhead. Allocator latency
could be further reduced by making these operations work without
disabling interrupts (like the fastpath and the free slowpath) but that
is another project.
It is interesting to note that BSD has gone to a scheme with partial
pages only per cpu (source: Adrian). Transfer of cpu ownerships is
done using IPIs. Probably too much overhead for our taste. The approach
here keeps the per node partial lists essentially meaning the "pages"
in there have no cpu owner.