Subject: How to implement register allocation constraints to guide allocator dispatching different registers for certain instruction?
Date: Wednesday 19th February 2014 09:09:44 UTC (over 4 years ago)
Hi, To fix this bug(http://llvm.org/bugs/show_bug.cgi?id=18881), we need to add more register constraints that for STLXR , Ws and Wt should not be the same register. Because these unpredictable instructions are valid instructions in MC layer, we couldn't just simply treat them as unallocated encoding. I suppose to add some extra rules on register allocator to avoid it allocating register causing any unpredictable behavior, but I don't have experience to this part. Can anybody tell me how to implement this or have better ideas to solve this problem? Thanks in advance. -- Best Regards, Kevin Qin